Vishay Sihg20n50c Power Mosfet Owner's Manual

VISHAY SiHG20N50C Power MOSFET 

Power MOSFET

FEATURES

• Low figure-of-merit Ron x Qg
• 100 % avalanche tested
• High peak current capability
• dv/dt ruggedness
• Improved Trr/Qrr
• Improved gate charge
• High power dissipations capability
• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Notes
a. Limited by maximum junction temperature
b. Repetitive rating; pulse width limited by maximum junction temperature
c. VDD = 50 V, starting TJ = 25 °C, L = 2.5 mH, Rg = 25 Ω, IAS = 17 A
d. ISD ≤ 18 A, di/dt ≤ 380 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
e. 1.6 mm from case

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER	SYMBOL	TEST CONDITIONS		MIN.	TYP.	MAX.	UNIT
Static
Drain-source breakdown voltage	VDS	VGS = 0 V, ID = 250 μA		500	–	–	V
VDS temperature coefficient	ÄVDS/TJ	Reference to 25 °C, ID = 1 mA		–	0.7	–	V/°C
Gate-source threshold voltage (N)	VGS(th)	VDS = VGS, ID = 250 μA		3.0	–	5.0	V
Gate-source leakage	IGSS	VGS = ± 30 V		–	–	± 100	nA
Zero gate voltage drain current	IDSS	VDS = 500 V, VGS = 0 V		–	–	25	μA
		VDS = 400 V, VGS = 0 V, TJ = 125 °C		–	–	250
Drain-source on-state resistance	RDS(on)	VGS = 10 V	ID = 10 A	–	0.225	0.270	Ù
Forward transconductance	gfs	VDS = 50 V, ID = 10 A		–	6.4	–	S
Dynamic
Input capacitance	Ciss	VGS = 0 V, VDS = 25 V, f = 1 MHz		–	2451	2942	pF
Output capacitance	Coss			–	300	360
Reverse transfer capacitance	Crss			–	26	32
Total gate charge	Qg	VGS = 10 V	ID = 18 A, VDS = 400 V	–	65	76	nC
Gate-source charge	Qgs			–	21	–
Gate-drain charge	Qgd			–	29	–
Turn-on delay time	td(on)	VDD = 250 V, ID = 18 A, Rg = 9.1 Ù		–	80	–	ns
Rise time	tr			–	27	–
Turn-off delay time	td(off)			–	32	–
Fall time	tf			–	44	–
Gate input resistance	Rg	f = 1 MHz, open drain		–	1.1	–	Ù
Drain-Source Body Diode Characteristics
Continuous source-drain diode current	IS	MOSFET symbol showing the integral reverse p – n junction diode		–	–	20	A
Pulsed diode forward current	ISM			–	–	80
Diode forward voltage	VSD	TJ = 25 °C, IS = 18 A, VGS = 0 V		–	–	1.5	V
Reverse recovery time	trr	TJ = 25 °C, IF = IS, di/dt = 100 A/μs, V = 35 V R		–	503	–	ns
Reverse recovery charge	Qrr			–	6.7	–	μC
Reverse recovery current	IRRM			–	30	–	A

TYPICAL CHARACTERISTICS

(25 °C, unless otherwise noted)

Peak Diode Recovery dV/dt Test Circuit

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91382.

TO-247AC (High Voltage)

VERSION 1: FACILITY CODE = 9

Notes

1. Package reference: JEDEC® TO247, variation AC
2. All dimensions are in mm
3. Slot required, notch may be rounded
4. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outermost extremes of the plastic body
5. Thermal pad contour optional with dimensions D1 and E1
6. Lead finish uncontrolled in L1
7. Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm
8. Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4 dimension at maximum material condition

VERSION 2: FACILITY CODE = Y

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994
2. Contour of slot optional
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outermost extremes of the plastic body
4. Thermal pad contour optional with dimensions D1 and E1
5. Lead finish uncontrolled in L1
6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154″)
7. Outline conforms to JEDEC outline TO-247 with exception of dimension c

VERSION 3: FACILITY CODE = N

ECN: E22-0452-Rev. G, 31-Oct-2022 DWG: 5971
Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994
2. Contour of slot optional
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outermost extremes of the plastic body
4. Thermal pad contour optional with dimensions D1 and E1
5. Lead finish uncontrolled in L1
6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154″)

Disclaimer

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References

• applications.no
• vishay.com/doc?91000
• vishay.com/doc?99912
• SiHG20N50C Power MOSFET | Vishay