Vishay Irfpf50 Siliconix Power Mosfet Instruction Manual (+ PDF)

Contents hide

1 IRFPF50 Siliconix Power MOSFET

2 Product Information

3 Product Usage Instructions

3.1 Documents / Resources

3.1.1 References

IRFPF50 Siliconix Power MOSFET

Product Information

Product Name: IRFPF50

Brand: Vishay Siliconix

Product Type: Power MOSFET

Package Type: D TO-247AC

Configuration: Single N-Channel MOSFET

Features:

RoHS-compliant
Drain-Source Voltage (VDS): 900V
Gate-Source Voltage (VGS): 10V
Continuous Drain Current (ID): 1.6A
Pulsed Drain Current (IDM): 200A
Total Gate Charge (Qg max.): 24nC

Product Usage Instructions

Ensure that the product is properly mounted using a 6-32 or M3
screw with the recommended mounting torque.
Connect the drain, gate, and source terminals of the MOSFET
according to your application requirements.
Provide a suitable voltage supply to the gate terminal, not
exceeding 10V.
Ensure that the drain-source voltage (VDS) does not exceed the
specified value of 900V.
Monitor the continuous drain current (ID) to ensure it does not
exceed the rated value of 1.6A.
If there are pulsed drain currents, ensure they do not exceed
the rated value of 200A.
Take into account the maximum power dissipation (PD) and ensure
it is within acceptable limits.
Consider the thermal resistance ratings for proper heat
dissipation.
Refer to the datasheet for detailed specifications and
characteristics of the MOSFET.

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IRFPF50
Vishay Siliconix

Power MOSFET

D TO-247AC

S
D G

S N-Channel MOSFET

PRODUCT SUMMARY

VDS (V) RDS(on) ()
Qg max.) (nC) Qgs (nC) Qgd (nC) Configuration

900

VGS = 10 V

1.6

200

110

Single

FEATURES

· Dynamic dV/dt rated

· Repetitive avalanche rated

· Isolated central mounting hole

Available

· Fast switching

· Ease of paralleling

· Simple drive requirements

· Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details

DESCRIPTION
Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-247AC package is preferred for commercial-industrial applications where higher power levels preclude the use of TO-220AB devices. The TO-247AC is similar but superior to the earlier TO-218 package because its isolated mounting hole. It also provides greater creepage distances between pins to meet the requirements of most safety specifications.

ORDERING INFORMATION
Package Lead (Pb)-free

TO-247AC IRFPF50PbF

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

Drain-source voltage Gate-source voltage
Continuous drain current
Pulsed drain current a Linear derating factor

VDS

VGS

VGS at 10 V

TC = 25 °C TC = 100 °C

IDM

Single pulse avalanche energy b Repetitive avalanche current a Repetitive avalanche energy a Maximum power dissipation Peak diode recovery dV/dt c

TC = 25 °C

EAS IAR EAR PD dV/dt

Operating junction and storage temperature range

Soldering recommendations (peak temperature)

for 10 s

TJ, Tstg

Mounting torque

6-32 or M3 screw

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. VDD = 50 V, starting TJ = 25 °C, L = 37 mH, Rg = 25 , IAS = 6.7 A (see fig. 12) c. ISD 6.7 A, dI/dt 130 A/s, VDD 600, TJ 150 °C d. 1.6 mm from case

LIMIT 900 ± 20 6.7 4.2 27 1.5 880 6.7 19 190 1.5
-55 to +150 300 d 10 1.1

UNIT V
A
W/°C mJ A mJ W V/ns °C
lbf · in N · m

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IRFPF50
Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER Maximum junction-to-ambient Case-to-sink, flat, greased surface Maximum junction-to-case (drain)

SYMBOL RthJA RthCS RthJC

TYP. –
0.24 –

MAX. 40 0.65

UNIT °C/W

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN. TYP. MAX. UNIT

Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage Gate-source leakage
Zero gate voltage drain current
Drain-source on-state resistance Forward transconductance Dynamic

VDS VDS/TJ VGS(th)
IGSS
IDSS
RDS(on) gfs

VGS = 0 V, ID = 250 A

Reference to 25 °C, ID = 1 mA

VDS = VGS, ID = 250 A

VGS = ± 20 V

VDS = 900 V, VGS = 0 V

VDS = 720 V, VGS = 0 V, TJ = 125 °C

VGS = 10 V

ID = 4.0 Ab

VDS = 100 V, ID = 4.0 Ab

900

–

1.2

–

V/°C

2.0

–

4.0

–

± 100 nA

–

100

–

500

–

1.6

4.9

–

Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Turn-on delay time Rise time Turn-off delay time Fall time
Internal drain inductance
Internal source inductance

Ciss Coss Crss Qg Qgs Qgd td(on)
tr td(off)
tf
LD
LS

VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5

–

2900

–

270

–

VGS = 10 V

ID = 6.7 A, VDS = 360

–

see fig. 6 and 13b

–

200

–

110

–

VDD = 450 V, ID = 6.7 A , RG = 6.2 , RD = 67 , see fig. 10b

–

130

–

Between lead, 6 mm (0.25″) from package and center of die contact

D G
S

–

5.0

–

Drain-Source Body Diode Characteristics

Continuous source-drain diode current Pulsed diode forward current a

MOSFET symbol

showing the

integral reverse

ISM

p – n junction diode

D
G S

–

6.7

–

Body diode voltage

VSD

TJ = 25 °C, IS = 6.7 A, VGS = 0 Vb

–

1.8

Body diode reverse recovery time Body diode reverse recovery charge

trr Qrr

–

TJ = 25 °C, IF = 6.7 A, dI/dt = 100 A/sb

–

610

920

3.2

4.8

Forward turn-on time

ton

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %.

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www.vishay.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

IRFPF50
Vishay Siliconix

Fig. 1 – Typical Output Characteristics, TC = 25 °C

Fig. 3 – Typical Transfer Characteristics

Fig. 2 – Typical Output Characteristics, TC = 150 °C

Fig. 4 – Normalized On-Resistance vs. Temperature

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IRFPF50
Vishay Siliconix

Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage

Fig. 7 – Typical Source-Drain Diode Forward Voltage

Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 8 – Maximum Safe Operating Area

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Fig. 9 – Maximum Drain Current vs. Case Temperature

IRFPF50
Vishay Siliconix

VDS VGS RG

RD D.U.T.

10 V
Pulse width 1 µs Duty factor 0.1 %

+- VDD

Fig. 10 – Switching Time Test Circuit

VDS 90 %

10 % VGS

td(on) tr

td(off) tf

Fig. 11 – Switching Time Waveforms

Fig. 12 – Maximum Effective Transient Thermal Impedance, Junction-to-Case

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VDS Vary tp to obtain required IAS
RG
10 V tp

L
D.U.T. IAS
0.01

+ – VDD
A

Fig. 13 – Unclamped Inductive Test Circuit

IRFPF50
Vishay Siliconix

VDS

VDS
tp VDD

IAS Fig. 14 – Unclamped Inductive Waveforms

Fig. 15 – Maximum Avalanche Energy vs. Drain Current

10 V QGS
VG

QG QGD

Charge

Fig. 16 – Basic Gate Charge Waveform

Current regulator Same type as D.U.T.

12 V

50 k

0.2 µF

0.3 µF

+ D.U.T. – VDS

VGS

3 mA

Current sampling resistors

Fig. 17 – Gate Charge Test Circuit

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D.U.T.
+ –

Peak Diode Recovery dV/dt Test Circuit

Circuit layout considerations

· Low stray inductance

· Ground plane

· Low leakage inductance

current transformer

–

IRFPF50
Vishay Siliconix

· dV/dt controlled by Rg

· Driver same type as D.U.T. · ISD controlled by duty factor “D”

– VDD

· D.U.T. – device under test

Driver gate drive

P.W.

Period

D =

P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse

recovery current

Body diode forward current dI/dt

D.U.T. VDS waveform

Diode recovery

dV/dt VDD

Re-applied voltage

Body diode forward drop Inductor current

Ripple 5 %

ISD

Note a. VGS = 5 V for logic level devices

Fig. 18 – For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91251.

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Package Information
Vishay Siliconix

TO-247AC (High Voltage)

VERSION 1: FACILITY CODE = 9

DIM. A A1 A2 b b1 b2 b3 b4 b5 c c1 D

MILLIMETERS

MIN.

NOM.

4.83

5.02

2.29

2.41

1.17

1.27

1.12

1.20

1.12

1.20

1.91

2.00

1.91

2.00

2.87

3.00

2.87

3.00

0.40

0.50

0.40

0.50

20.40

20.55

MAX. 5.21 2.55 1.37 1.33 1.28 2.39 2.34 3.22 3.18 0.60 0.56 20.70

NOTES
6 6, 8
6 4

DIM. D1 D2 E E1 E2 e L L1 Ø P Ø P1 Q S

MIN. 16.46 0.56 15.50 13.46 4.52
14.90 3.96 3.56
5.31

MILLIMETERS NOM. 16.76 0.66 15.70 14.02 4.91
5.46 BSC 15.15 4.06 3.61 7.19 ref. 5.50
5.51 BSC

MAX. 17.06 0.76 15.87 14.16 5.49
15.40 4.16 3.65
5.69

NOTES 5
4 5 3
6 7

Notes
(1) Package reference: JEDEC® TO247, variation AC (2) All dimensions are in mm (3) Slot required, notch may be rounded (4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the
outermost extremes of the plastic body (5) Thermal pad contour optional with dimensions D1 and E1 (6) Lead finish uncontrolled in L1 (7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm (8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4
dimension at maximum material condition

Revision: 31-Oct-2022

Document Number: 91360

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VERSION 2: FACILITY CODE = Y

B 3 R/2
Q

4 E
E/2 S

2 x R

(2)

5 L1

2 x b2

3 x b

2x e

0.10 M C A M

Lead Assignments 1. Gate 2. Drain 3. Source 4. Drain

See view B

Package Information
Vishay Siliconix

A A2 A
4
D

A 7 ØP Ø k M DBM
D2

(Datum B) ØP1
4 D1

4 Thermal pad

A C A1
D DE E CC
View B

Planting

4 E1 0.01 M D B M View A – A
(b1, b3, b5)

Base metal

(c)

(b, b2, b4) (4)
Section C – C, D – D, E – E

DIM. A A1 A2 b b1 b2 b3 b4 b5 c c1 D D1

MILLIMETERS

MIN.

MAX.

4.58

5.31

2.21

2.59

1.17

2.49

0.99

1.40

0.99

1.35

1.53

2.39

1.65

2.37

2.42

3.43

2.59

3.38

0.38

0.86

0.38

0.76

19.71

20.82

13.08

–

NOTES

DIM. D2 E E1 e Ø k L L1 Ø P Ø P1 Q R S

MILLIMETERS

MIN.

MAX.

0.51

1.30

15.29

15.87

13.72

–

5.46 BSC

0.254

14.20

16.25

3.71

4.29

3.51

3.66

–

7.39

5.31

5.69

4.52

5.49

5.51 BSC

NOTES

Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at
the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154″) (7) Outline conforms to JEDEC outline TO-247 with exception of dimension c

Revision: 31-Oct-2022

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VERSION 3: FACILITY CODE = N

B R/2

E N

Package Information
Vishay Siliconix

A P1

c1 D1

K M DBM

b2 b

b4 e

0.10 M C A M

C A1
Base metal

E1 0.01 M D B M
b1, b3, b5

Plating

b, b2, b4

MILLIMETERS

DIM.

MIN.

4.65

2.21

1.17

0.99

1.65

2.59

0.38

19.71

13.08

ECN: E22-0452-Rev. G, 31-Oct-2022 DWG: 5971

MAX. 5.31 2.59 1.37 1.40 1.35 2.39 2.34 3.43 3.38 0.89 0.84 20.70
–

DIM. D2 E E1 e k L L1 N P P1 Q R S

MIN. 0.51 15.29 13.46
14.20 3.71
3.56 –
5.31 4.52

5.46 BSC 0.254
7.62 BSC
5.51 BSC

MAX. 1.35 15.87
–
16.10 4.29
3.66 7.39 5.69 5.49

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ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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