Analog Devices Ltc3311 25a Multiphase 2mhz Automotive Low Emi Buck Regulator User Guide

ANALOG DEVICES LTC3311 25A Multiphase 2MHz Automotive Low EMI Buck Regulator

DESCRIPTION

Demonstration Circuit 3186A features the LTC®3311 12.5A, low voltage synchronous step-down Silent Switcher® operating as a multiphase 2MHz, 3V to 5.5V input, 1.2V buck regulator. The DC3186A has three build options to provide a two phase 25A, three phase 37.5A, or four phase 50A output solution. The LTC3311 supports
adjustable output voltages from 0.5V to VIN and operat-ing frequencies from 500kHz up to 5MHz in multiphase operation. All phases of DC3186A operate in forced con-tinuous mode.
The DC3186A also has an EMI filter to reduce conducted EMI. This EMI filter can be included by applying the input voltage at the VIN EMI terminal.

The Efficiency vs Load graph shows the efficiency of the circuit with a 3.3V input for all three build options.
An on-board transient circuit is included to measure fast transient performance.
The LTC3311 data sheet gives a complete description of the part, its operation, and application information. The data sheet must be read in conjunction with this demo manual. The LTC3311 is assembled in a 3mm × 3mm LQFN package with exposed pads for low thermal resistance.

Design files for this circuit board are available.

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PERFORMANCE SUMMARY

Specifications are at TA = 25°C

QUICK START PROCEDURE

Refer to Figure 1 for the proper measurement equipment setup and follow the procedure below:

NOTE: For accurate VIN, VOUT and efficiency measurements, measure VIN at the VIN SNSE and GND SNSN turrets, and measure VOUT at the VOUT SNSE and GND SNSE turrets, as illustrated as VM1 and VM2 in Figure 1. When measuring the input or output ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. Measure the output voltage ripple by touching the probe tip directly across the output turrets or to TP1 as shown in Figure 2.

1. Set the JP1 Jumper to the HI position.
2. With power off, connect the input power supply to VIN and GND. If the input EMI filter is desired, connect the input power supply to VIN EMI and GND.
3. Set power supply PS1 current limit to 40A. Set the electronic load LD1 to CC mode and 0A current. Slowly increase PS1 to 1V. If PS1 output current reads less than 20mA, increase PS1 to 3.3V. Verify that VM1 reads 3.3V and VM2 reads 1.2V. Check VM1, VM2, VM3, PS1 output current, and LD1 input current. Connect an oscilloscope voltage probe as shown in Figure 2. Set Channel to AC-coupled, voltage scale to 20mV and time base to 10µs. Check VOUT ripple voltage. Verify that PGOOD voltage is above 3V.
4. Increase the load by 1A intervals up to full load and observe the voltage output regulation, ripple voltage.
5. To test the transient response with a base load, add the desired resistor to produce a minimum load between VOUT and I_STEP turrets (RL shown on Figure 1).
   Note that the total load resistance will be RL plus R16 (10mΩ). The DC3186A uses a buffered signal generator input to drive a source follower circuit, and to control the slew rate and amplitude of the current transient. The source follower FET, Q1, operates in the linear region during the load step.
6. Connect PS2 to DRIVER BIAS and GND turrets. Turn on and set PS2 to 8V.
7. Set a signal generator with a 1ms pulse width, a 10ms period and an amplitude from 0V to 4V, and then connect it to SG_INPUT turret.
   NOTE: Do not allow the pulse generator to have more than a 20% duty cycle. This can allow too much power to be dissipated in Q1 and can damage the FET.
8. Connect an oscilloscope with a time scale of 200µs/div with one channel having a vertical scale of 2V/div on the SG_INPUT and another with a vertical scale of 50mV/div to the I_STEP turret.
9. Measure the I_STEP voltage to observe the current, VI_STEP/10mΩ. Adjust the amplitude of the pulse to provide the desired transient. Adjust the rising and falling edge of the pulse to provide the desired ramp rate. Figure 5 shows a load step from 10A to 20A in 1µs. Refer to the following equations:
10. When done, turn off SG1, PS1 and Load. Remove all the connections to the demo board.

TEST SETUP

TYPICAL PERFORMANCE CHARACTERISTICS

THEORY OF OPERATION

Introduction to the DC3186A
The DC3186A demonstration circuit features the LTC3311, an automotive grade low voltage synchronous step-down Silent Switcher in a two, three, or four phase operation. The LTC3311 is a monolithic, constant frequency, current mode step-down DC/DC converter. Connecting the RT pin of the master phase with a resistor to AGND programs
the frequency from 500kHz to 5MHz. With RT resistor on master phase, the MODE/SYNC pin becomes a clock output to drive the MODE/SYNC pins of the slave phases. The DC3186A can operate with an external clock by short-ing the master phase RT pin to VIN with a 0Ω resistor in the R5 location and applying a clock signal on the MODE/SYNC turret. If the EN pin is low, the LTC3311 is in shut down and in a low quiescent current state. When the EN pin is above its threshold, the switching regulator will be enabled.

Connecting the FB pin to VIN configures a phase as a slave. The MODE/SYNC pin becomes an input, and the voltage control loop is disabled. The current control loop in the slave phase is still active, and the peak current is controlled via the shared ITH node. The phasing of a slave phase relative to the master phase is programmed with a resistor divider on the RT pin. Refer to Table 5 of the data sheet for more information on setting the slave phase angle.

In the multiphase application, the LTC3311 operates in forced continuous mode. At light loads, the slave phases will continue to operate in forced continuous mode.
Setting the compensation for the multiphase is similar to setting the compensation to the single phase. When designing the compensation network, controlling the loop stability and transient response are the two main consideration. The LTC3311 has been designed to operate at a high bandwidth for fast transient response capabili-ties. This reduces output capacitance required to meet the desired transient voltage range. The mid-band gain of the loop increases with R8 and the bandwidth of the loop increases with decreasing C14. C11 along with R6 provides a phase lead which will improve the phase mar-gin. C13, C33, C34, and C44 along with R8 provides a high frequency pole to reduce the high frequency gain. C13, C33, C34, and C44 are in parallel on the ITH node. The sum of these caps will be the total capacitance on the master phase ITH pin. Too much capacitance will slow down the response time.

Loop stability is generally measured using the Bode Plot method of plotting loop gain in dB and phase shift in degrees. The 0dB crossover frequency should be less the 1/6 of the operating frequency to reduce the effects of added phase shift of the modulator. The control loop phase margin goal should be 45° or greater and a gain margin goal of 8dB or greater. Refer to the LTC3311 data sheet and LTPowerCAD for more information on choosing the required components.
The soft-start of the multiphase regulator is controlled by a single cap, C12, on the master phase. After the regulator is in regulation the SSTT pin can be used to monitor the temperature of each IC. The master phase temperature can be monitored at the SSTT turret and slave 1, 2, and 3 can be monitored at TP3, 4, and 6 respectively. Calculate the die temperature with the formula below:

PARTS LIST

DC3186A-A Required Circuit Components

Additional Demo Board Circuit Components

Hardware: For Demo Board Only

DC3186A-B Required Circuit Components

Additional Demo Board Circuit Components

Hardware: For Demo Board Only

DC3186A-C Required Circuit Components

Additional Demo Board Circuit Components

Hardware: For Demo Board Only

SCHEMATIC DIAGRAM

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ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high-energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.

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References

• Mixed-signal and digital signal processing ICs | Analog Devices