Maxlinear Xr77103-a0r5 Universal Pmic 3 Output Buck Regulator User Manual

MAXLINEAR XR77103-A0R5 Universal PMIC 3 Output Buck Regulator

Introduction

The XR77103-A0R5 evaluation board provides a platform to evaluate the features and performance of the XR77103-A0R5 Universal PMIC 3 Output Buck Regulator. The XR77103-A0R5 output voltages are set via an external resistor divider down to 0.8V with a 4.5V to 14V input voltage range, and it is packaged in a 4mm x 4mm TQFN.

Quick EVB Set Up and Start-Up
Factory Settings
The evaluation board has been set up with the following factory default configuration for quick set up and operation:

• VIN = 5.5V to 14V, optimized for a 12V input rail.
• Maximum IOUT per channel is 2A.
• 500kHz Switching frequency.
• Two channels may be paralleled for output currents up to 5A peak and 4A steady state (however additional hardware modification is required for parallel operation).
• Low power spectral density (PSM) mode operation enabled.

Quick Start Up
To quickly see the regulator in operation:

1. 1. Use the factory settings and default configuration. If other settings or components are desired, apply them before the next steps. For more information, see
   “System Set-Up” on page 5 for more.
2. Connect a turned-off power supply that is within the above VIN specification (from 5.5V to 14V, 12V typical) to VIN+ and VIN- with short and thick leads. Use test pins EXT. VIN (J39) and AGND (J7) to connect and monitor VIN+ and VIN- respectively. See locations in Figure 1 on page 2.
3. Initially set to 0A, connect electronic loads to each desired channel that will be no more than the maximum IOUT (2A) to VOUTx and PGNDx (where x = the channel number) with short and thick leads. Use test pins in Table 1 on page 1 to connect and monitor VOUTx and PGNDx respectively. See locations in Figure 1 on page 2. For all channels with the electronic load connected, ensure that the respective VIN jumper is installed per Table 1 on page 1.
4. Turn on the 12V power supply and check VOUT. The EVB powers up and regulates the enabled outputs at 3.3V (Ch1), 1.8V (Ch2) and 1.2V (Ch3) (factory default settings). PGOOD is asserted active high once sequencing is done, outputs are in regulation, and reset timer expires.
5. Set or vary the load (do not exceed the maximum IOUT) and check VOUT and other desired performance levels such as regulation and efficiency. For more information about monitoring, see “I/O and Test Points” on page 4 .

Table 1: Jumper Connections for VIN, VOUT and PGND

1. Factory default: jumpers installed.

Reference Documentation
For additional information, refer to the XR77103-A0R5 data sheet, including a full list of IC features, pinout, pin descriptions, typical performance characteristics, and external component calculations.
Ordering Information
Table 2: Evaluation Board Ordering Part Number

This manual provides the EVB schematics (“XR77103EVB-A0R5 Schematic” on page 7 ), the PCB layout
(“XR77103EVB-A0R5 Schematic” on page 7 ) and the bill of materials (“XR77103EVB-A0R5 Bill of Materials” on page 10 ) that you can use on your board design.
For more information about the schematics, go to www.maxlinear.com/XR77103-A0R5.

Note: For the most up-to-date information, go to www.maxlinear.com/XR77103-A0R5.

Evaluation Board Overview

The XR77103-A0R5 EVB block diagram is shown in Figure 3.

I/O and Test Points

VIN, LX and PGOOD Test Points
Test points are available for VIN (TP8), the LX switching nodes (TP6 for LX1, TP7 for LX2, and TP1 for LX3), the compensation pins (TP4 for COMP1, TP5 for COMP2, TP3 for COMP3), and PGOOD (TP2) for monitoring.
Table 3: Test Points

The PGOOD output can be used externally. For more information about PGOOD options, see “Jumper J8” on page 5 .

Jumper J3
Table 5: Jumper J3 Options for the EN Pin

Jumper J8
Table 6: Jumper J8 Pull Up Options for the PGOOD Pin

Jumper J11
For operation from a 5V rail, it is required that the LDO output is connected to VIN, which can be accomplished by populating J11. This enhances the operation of the drivers for VIN < 5V.

Important: Remove J11 for operation at higher VIN. The board also has Zener diode placeholders which can be installed to protect the IC if higher VIN is accidentally applied.

Table 7: Jumper J11 and Operation from a 5V Rail

Jumpers J14, J20 and J24
Jumpers J14, J20 and J24 are available to connect or disconnect VIN from VIN1, VIN2, and VIN3 respectively. Factory default is VIN is connected to VIN1, VIN2, and VIN3.

Jumper J15
Jumper J15 is available to ground SYNC. Factory default is that the SYNC pin is not grounded on the board. When not grounded, the SYNC pin may be connected and synchronized to an external clock in applications where EMI control is critical.

XR77103EVB-A0R5 Schematic

XR77103EVB-A0R5 PCB Layers

XR77103EVB-A0R5 Bill of Materials
Table 8: XR77103EVB-A0R5 Bill of Materials

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References

• XR76108 - MaxLinear
• XR76117 - MaxLinear
• XR77103 - MaxLinear
• XR77103-A0R5 - MaxLinear
• XR77103-A1R0 - MaxLinear