Fibocom Fg360-na 5g Smart Module User Guide

Fibocom Fg360-na 5g Smart Module User Guide

Fibocom FG360-NA 5G Smart Module logo

Fibocom FG360-NA 5G Smart Module

Fibocom FG360-NA 5G Smart Module fproduct

Copyright
Copyright © 2021 Fibocom Wireless Inc. All rights reserved.
Without the prior written permission of the copyright holder, any company or individual is prohibited to excerpt, copy any part of or the entire document, or distribute the document in any form.

Notice
The document is subject to update from time to time owing to the product version upgrade or other reasons. Unless otherwise specified, the document only serves as the user guide. All the statements, information and suggestions contained in the document do not constitute any explicit or implicit guarantee.

Trademark

Fibocom FG360-NA 5G Smart Module logoThe trademark is registered and owned by Fibocom Wireless Inc.

Foreword

Introduction
The document describes the electrical characteristics, RF performance, dimensions and application environment, etc. of FG360-NA (hereinafter referred to as FG360). With the assistance of the document and other instructions, the developers can quickly understand the hardware functions of FG360 modules and develop products.

Overview

Introduction

The FG360 series module is a 5G module which supports NSA and SA network architectures. The FG360 integrates core devices such as Baseband, Memory, PMU, Transceiver, and PA. It supports 5G NR Sub6, FDD-LTE, and TDD-LTE long-distance communication modes. Supports uplink 2×2 MIMO and downlink 4×4 MIMO multi-antenna configuration in SA mode. It also supports GNSS wireless positioning technology. The FG360 is designed in an LGA package and is suitable for a variety of eMBB scenarios, such as CPE, VR/AR, gateway, TV box, and intelligent monitoring.

Key Features
Table 2-1 Key features

PerformanceDescription
 

 

Operating Band

LTE FDD: B2, B4, B5, B12, B66, B71
LTE TDD: B41, B46
NR: n25, n41, n66, n71
GNSSSupport GPS, GLONASS, Galileo, BDS, QZSS
NR3GPP Release 15
LTE3GPP Release 15
 

 

Feature

NR:

DL 4×4 MIMO: n25, n41, n66, n71 UL 2×2MIMO: n41

 

LTE:

DL 4×4MIMO: B2, B4, B41 ,B66, B71

 NSA and SA supported
SRS: n41, Support: 1T2R, 1T4R, 2T4R
HPUE: B41, n41
 

 

Data Transmission

SA 5G/NR Sub-6 PeakDL 4.43Gbps/UL 1.25Gbps
NSA PeakDL 3.74Gbps/UL 700Mbps
LTEDL 1.6Gbps (CAT19)/UL 211Mbps (CAT18)
Power SupplyDC: 3.3~4.4V, typical voltage: 3.8V
 

 

Temperature

Normal operating temperature: -30~75℃1

Extended operating temperature: -40~85℃2 Storage temperature: -40~85℃

Physical characteristicsDimension: 41 mm×44mm×2.75 mm Package: 430 pin LGA

Weight: about 12.0 g

CPUARM Cortex-A55, quad core, up to 2.0 GHz
Memory2GB LPDDR4x+32GB eMMC Flash
Interface
USB InterfaceUSB2.0 high speed (HS) interface, data transmission rate up to 480Mbps

USB3.0 Super-speed (SS) interface, data transmission rate up to 5Gbps

PCIe InterfacePCIe Gen3 2Lane×1, PCIe Gen3 1Lane×2 (PCIe only support RC mode)
 

SIM Interface

Dual SIM: 1.8V/3V SIM1: USIM

SIM2: ESIM/USIM

I2COne set of I2C interface, data transmission rate up to 400Kbit/s
ADCsA/D conversion channel, Voltage Range: 0~1.45V
Software
Firmware updateUSB/PCIe/FOTA
Operating SystemLinux/Android/Windows

Note: 

  1. When the temperature keeps in the range of -30~75°C, the module can work normally. Module performance meets the 3GPP specifications.
  2. When temperature keeps in the range of -40~85°C, module performance may be slightly out of 3GPP specifications.

Application Framework

The application framework below shows the main hardware functions of the FG360 module:

  • Baseband
  • RF transceiver
  • PMU
  • Memory
  • Peripheral interfaceFibocom FG360-NA 5G Smart Module fig 2

Antenna Configuration 

FG360 module supports seven antennas and the configuration is as below table:

PADFunction

Description

Band

Configuration(TX)

Band

Configuration(RX)

Frequency

Range(MHz)

130LB TRX

MHB sec TRX

B4/5/12/66/71 n25/41/66/71B2/4/5/12/41/66/71 n25/41/66/71617~2690
175MHB TRX

LAA RX LB RX

B2/4/41/66

n25/41/66

B2/4/41/46/66/71

n25/41/66/71

617~5925
157MHB/LAA RxOnly SRSB2/4/41/46/66/71 n25/41/66/71617~5925
139LMHB RxOnly SRSB2/4/5/12/41/66/71

n25/41/66/71

617~2690
148Reserved   
193Reserved   
199GNSS GNSS receive 

Warning

Important Notice to OEM integrators

  1. This module is limited to OEM installation ONLY.
  2. This module is limited to installation in fixed applications, according to Part 2.1091(b).
  3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations
  4. For FCC Part 15.31 (h) and (k): The host manufacturer is responsible for additional testing to verify compliance as a composite system. When testing the host device for compliance with Part 15 Subpart B, the host manufacturer is required to show compliance with Part 15 Subpart B while the transmitter module(s) are installed and operating. The modules should be transmitting and the evaluation should confirm that the module’s intentional emissions are compliant (i.e. fundamental and out of band emissions). The host manufacturer must verify that there are no additional unintentional emissions other than what is permitted in Part 15 Subpart B or emissions are compliant with the transmitter(s) rule(s). The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed.

Important Note
notice that any deviation(s) from the defined parameters of the antenna trace, as described by the instructions, require that the host product manufacturer must notify to Fibocom Wireless Inc. that they wish to change
the antenna trace design. In this case, a Class II permissive change application is required to be filed by the USI, or the host manufacturer can take responsibility through the change in FCC ID (new application) procedure followed by a Class II permissive change application.

End Product Labeling
When the module is installed in the host device, the FCC/IC ID label must be visible through a window on the final device or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the outside of the final device that contains the following text: “Contains FCC ID: ZMOFG360NA05”
The FCC ID can be used only when all FCC mpliance requirements are met.

Antenna Installation 

  1. The antenna must be installed such that 20 cm is maintained between the antenna and users,
  2. The transmitter module may not be co-located with any other transmitter or antenna.
  3. Only antennas of the same type and with equal or less gains as shown below may be used with this module. Other types of antennas and/or higher gain antennas may require additional authorization for operation.
  4. The max allowed antenna gain is 3.76dBi for external monopole antenna.
    In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC/IC authorization.

Manual Information to the End User
The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual.

FCC Statement

Federal Communication Commission Interference Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures:

  • Reorient or relocate the receiving antenna.
  • Increase the separation between the equipment and receiver.
  • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
  • Consult the dealer or an experienced radio/TV technician for help.

Any changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter.

This device is intended only for OEM integrators under the following conditions: (For module device use)

  1. The antenna must be installed such that 20 cm is maintained between the antenna and users, and
  2. The transmitter module may not be co-located with any other transmitter or antenna.

As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed.

Radiation Exposure Statement

This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator & your body.

Pin Definition

The FG360 module applies LGA interface with 430 pins.

Pin MapFibocom FG360-NA 5G Smart Module fig 3

Note: The pin “RESERVED” means that the position pin is reserved and does not need to be connected.

Table of Pin No. and Pin Name
Table 3-1 Table of pin no. and pin name

 

No.

 

PIN Name

 

No.

 

PIN Name

 

No.

 

PIN Name

 

No.

 

PIN Name

 

No.

 

PIN Name

1PWRKEY2PON_13CLK_OUT4SYS_RESIN_N5SPI0_MISO
6SPI0_CSB7SIM1_VDD8SPI0_MOSI9SPI0_CLK10SIM1_DATA
11SIM2_RST12SIM2_DATA13SIM1_CLK14SIM1_DET15SIM2_CLK
16SIM1_RST17SGMII_1_TXN18SIM2_VDD19GND20SGMII_1_TXP
21SGMII_0_TXP22SGMII_1_RXN23RESERVED24SGMII_0_TXN25SGMII_1_RXP
26PCIE_B_LN0_TXN27EINT1728GBE0_RST29PCIE_B_LN0_TXP30PCIE_B_LN0_RXP
31GND32RESERVED33PCIE_B_LN0_RXN34PCIE_A_CLKN35~36GND
37PCIE_A_CLKP38PCIE_D_LN0_TXP39PCIE_D_LN0_TXN40PCIE_A_LN0_TXN41PCIE_D_LN0_RXP
42GND43PCIE_A_LN0_TXP44PCIE_D_LN0_RXN45SDC_CLK46PCIE_A_LN0_RXN
47SDC_CMD48RESERVED49PCIE_A_LN0_RXP50GND51SDC_DATA2
52GND53SDC_DATA154SDC_DATA355SSUSB_TXN56SDC_DATA0
57VBUS_DET58SSUSB_TXP59USB_DM60USB_ID61SSUSB_RXN
62USB_DP63SSUSB_RXP64AP_URTS165GBE1_INT66MDC
67PCIE_B_PEWAKEN68G3BE1_RST69MDIO70PCIE_B_CLKREQN71LSCE0B
72LSDA73AP_URXD174LSDI75LSA076PCIE_B_PERSTN
77AP_UTXD178LRSTB79AP_UCTS180LSCK81~83GND
84~89VBAT_RF90~92GND93PCM0_SYNC94I2S0_MCK95PCM0_DI
96PCM0_CLK97PCM0_DO98CDC_RESET_N99PTA_TX100CDC_INT1_N
101I2S0_BCK102PTA_RX103I2S0_DO104I2S0_DI105I2S0_LRCK
106NET_STATUS107AUDIO_PWR_EN108STATUS109W_DISABLE110NET_MODE
111SLEEP_IND112I2C_SCL0113WAKEUP_IN114ISINK1115I2C_SDA0
116ANTCTL3117IRIG_B118~119GND120GPS_PPS121NC
122GND123EINT20124~125GND126DBG_UART_RX127~128GND
129DBG_UART_TX130ANT8_M131~134GND135BT_UTXD136~137GND
138BT_URXD139ANT7_D140GND141DSI_TE142~143GND
144EINT16145~147GND148ANT6149GND150BT_PRI_RXD
151~152GND153BT_ACT_TXD154~155GND156DISP_PWM157ANT5_M2
 

 

158

 

 

GND

 

 

159

 

 

USB_DRVBUS

 

 

160~161

 

 

GND

 

 

162

GPIO78/

 

PCIE_D_CLKREQN

 

 

163~164

 

 

GND

 

No.

 

PIN Name

 

No.

 

PIN Name

 

No.

 

PIN Name

 

No.

 

PIN Name

 

No.

 

PIN Name

165NC166NC167GND168NC169~170GND
171NC172~173GND174NC175ANT3_M1176GND
177NC178~179GND180LCD_PWR_EN2181~182GND183TDI
184NC185GND186TCK187~188GND189TDO
190~192GND193ANT1194~197GND198MIPI1_D_SDATA199ANT10_GNSS
200GND201MIPI1_D_SCLK202~203GND204ANTCTL2205NC
 

 

206

 

 

GND

 

 

207

 

 

ANTCTL1

 

 

208

 

 

GND

 

 

209

GPIO76/

 

PCIE_D_PERSTN

 

 

210

 

 

ANTCTL0

211SDIO_VDD212EINT15213~215GND216MIPI2_D_SDATA217RESERVED
218GND219MIPI2_D_SCLK220~222GND223RESERVED224GND
225VDD_EXT_1V8226~228GND229RESERVED230GND231NC
232~234GND235RESERVED236GND237RESERVED238~239GND
240~241RESERVED242GND243RESERVED244~245GND246~247RESERVED
248GND249ADC0250~251GND252ADC1253RESERVED
254GND255NC256~258GND259RESERVED260GND
261VBAT_BB262GND263~264VBAT_BB265PCIE_D_CLKN266GND
267SIM2_DET268SGMII_0_RXP269SGMII_0_RXN270SGMII_PWR_EN1271PCIE_B_CLKP
272PCIE_B_CLKN273USB_BOOT274PCIE_A_PEWAKEN275PCIE_A_PERSTN276PCIE_A_CLKREQN
277GND278GBE0_INT279EINT18280SDC_DET281SD_PWR_EN
 

 

282

 

 

BT_URTS

 

 

283

 

 

BT_UCTS

 

 

284

 

 

GND

 

 

285

GPIO77/

 

PCIE_D_PEWAKEN

 

 

286

 

 

WIFI_GPIO1

287WLAN_ACT288LCM_RST289GND290NC291WIFI_GPIO2
292NC293RESERVED294NC295TRST_N296TMS
297SYSRSTB298LCD_PWR_EN1299~392GND393PCIE_C_LN0_RXN394PCIE_C_LN0_RXP
395PCIE_C_LN0_TXP396PCIE_C_LN0_TXN397~398GND399PCIE_C_CLKP400PCIE_C_CLKN
401PCIE_C_PERSTN402PCIE_C_CLKREQN403PCIE_C_PEWAKEN404DSI0_D0P405DSI0_D0N
406DSI0_CKN407DSI0_CKP408DSI0_D1N409DSI0_D1P410~425NC
426RESERVED427RESERVED428RESERVED429RESERVED430RESERVED

Pin Definition

Table 3-2 IO Parameter definition

TypeDescription
PIPower Input
POPower Output
DIDigital Input
DODigital Output
DIODigital Input/Output
AIAnalog Input
AOAnalog Output
AIOAnalog Input/Output
ODOpen Drain
PUInternal pull up
PDInternal pull down
Hi-ZHigh impedance

Table 3-3 LGA pin description

Pin NamePin No.TypePower DomainReset ValuePin Description
Power
VBAT_BB261 263, 264PIBaseband   power input
VBAT_RF84, 85, 86, 87,

88, 89

PIRF power input
VDD_EXT_1V8225PO1.8V   power output
USB
SSUSB_TXN55AOUSB super speed transmit

data minus

SSUSB_TXP58AOUSB super speed transmit

data plus

SSUSB_RXN61AIUSB super speed receive data

minus

SSUSB_RXP63AIUSB super speed receive data

plus

USB_DM59AIOUSB high speed data minus
USB_DP62AIOUSB high speed data plus
VBUS_DET57DIUSB VBUS detection
USB_DRVBUS159DOVDD_EXT_1V8PDUSB OTG power enable
USB_ID60DIVDD_EXT_1V8PDUSB ID
USIM
Pin NamePin No.TypePower DomainReset ValuePin Description
SIM1_VDD7POSIM1 power supply,3V/1.8V
SIM1_DATA10DIOSIM1_VDDPDSIM1 data input/output
SIM1_CLK13DOSIM1_VDDPDSIM1 clock signal
SIM1_RST16DOSIM1_VDDPDSIM1 reset signal
SIM1_DET14DIVDD_EXT_1V8PDSIM1 detect signal
SIM2_VDD18POSIM2 power supply,3V/1.8V,

Reserved

SIM2_DATA12DIOSIM2_VDDPDSIM2 data input/output,

Reserved

SIM2_CLK15DOSIM2_VDDPDSIM2 clock signal, Reserved
SIM2_RST11DOSIM2_VDDPDSIM2 reset signal, Reserved
SIM2_DET267DIVDD_EXT_1V8PDSIM2 detect, Reserved
GPIO
W_DISABLE109DIVDD_EXT_1V8PDModule airplane mode control

signal

WAKEUP_IN113DIVDD_EXT_1V8PDModule wake up input from

host

NET_STATUS106DOVDD_EXT_1V8PDModule network status

indication

NET_MODE110DOVDD_EXT_1V8PDModule network mode

indication

SLEEP_IND111DOVDD_EXT_1V8PDModule output to wake up

host

STATUS108DOVDD_EXT_1V8PDModule current working status

indication

IRIG_B117DOVDD_EXT_1V8PDB code output
GPS_PPS120DOVDD_EXT_1V8PDPPS signal output
ISINK1114AIVBAT_BBHI-ZLED negative drive signal
ANT
ANT1193AIOUCB TRx
NC184AIONC
ANT3_M1175AIO41 TRx + MHB/UCB/LAA Rx
NC166AIONC
ANT5_M2157AIOMHB/UCB/LAA Rx
ANT6148AIOUCB TRx
ANT7_D139AIOLMHB Rx
ANT8_M130AIOLMH TRX
NC121AIONC
ANT10_GNSS199AIGNSS antenna
NC205AIONC
ANT Tuner Control
MIPI1_D_SDATA198DIOVDD_EXT_1V8PDExternal Tuner MIPI Control

Data Pin

MIPI1_D_SCLK201DOVDD_EXT_1V8PDExternal Tuner MIPI Control

Clock Pin

MIPI2_D_SDATA216DIOVDD_EXT_1V8PDExternal Tuner MIPI Control

Data Pin

Pin NamePin No.TypePower DomainReset ValuePin Description
MIPI2_D_SCLK219DOVDD_EXT_1V8PDExternal Tuner MIPI Control

Clock Pin

ANTCTL0210DO1.8VPDAntenna control signal 0
ANTCTL1207DO1.8VPDAntenna control signal 1
ANTCTL2204DO1.8VPDAntenna control signal 2
ANTCTL3116DO1.8VPDAntenna control signal 3
Module Control
PWRKEY1DI1.8VPUModule power-key control

signal

SYS_RESIN_N4DI1.8VPUModule reset control signal
PON_12DI≤VBAT_BBPUModule power on signal
 

EINT20

 

123

 

DI

 

VDD_EXT_1V8

 

PD

MT6890 interruput input signal, used for WPS key

input signal

USB_BOOT273DIVDD_EXT_1V8PDForce into USB download boot

mode

SD
SDC_CMD47DIOSDIO_VDDPDSDC interface command

signal

SDC_DATA153DIOSDIO_VDDPDSDC interface DATA1 signal
SDC_DATA056DIOSDIO_VDDPDSDC interface DATA0 signal
SDC_CLK45DOSDIO_VDDPDSDC interface clock signal
SDC_DATA251DIOSDIO_VDDPDSDC interface DATA2 signal
SDC_DATA354DIOSDIO_VDDPDSDC interface DATA3 signal
SDC_DET280DIVDD_EXT_1V8PDSD card insert detection
SD_PWR_EN281DOVDD_EXT_1V8PDSD card power supply enable
SDIO_VDD211POSDC interface I/O power

domain

SGMII
SGMII_1_RXN22AIOAVDD12_SGMI

I

SGMII 1 receive data minus
SGMII_1_RXP25AIOAVDD12_SGMI

I

SGMII 1 receive data plus
SGMII_1_TXN17AIOAVDD12_SGMI

I

SGMII 1 transmit data minus
SGMII_1_TXP20AIOAVDD12_SGMI

I

SGMII 1 transmit data plus
GBE1_INT65DIVDD_EXT_1V8PDSGMII 1 interrupt input signal
GBE1_RST68DOVDD_EXT_1V8PDSGMII 1 reset signal
SGMII_0_RXN269AIOAVDD12_SGMI

I

SGMII 0 receive data minus
SGMII_0_RXP268AIOAVDD12_SGMI

I

SGMII 0 receive data plus
SGMII_0_TXN24AIOAVDD12_SGMI

I

SGMII 0 transmit data minus
SGMII_0_TXP21AIOAVDD12_SGMI

I

SGMII 0 transmit data plus
Pin NamePin No.TypePower DomainReset ValuePin Description
GBE0_INT278DIVDD_EXT_1V8PDSGMII 0 interrupt input signal
GBE0_RST28DOVDD_EXT_1V8PDSGMII 0 reset signal
SGMII_PWR_EN1270DOVDD_EXT_1V8PDSGMII power supply enable 1
MDIO69DIOVDD_EXT_1V8PDSGMII MDIO signal
MDC66DOVDD_EXT_1V8PDSGMII MDC signal
PCIE
PCIE_A_CLKN34AIOAVDD12_PCIEPCIe A reference clock minus
PCIE_A_CLKP37AIOAVDD12_PCIEPCIe A reference clock plus
PCIE_A_LN0_TXN40AIOAVDD12_PCIEPCIe A Tx0 minus
PCIE_A_LN0_TXP43AIOAVDD12_PCIEPCIe A Tx0 plus
PCIE_A_LN0_RXN46AIOAVDD12_PCIEPCIe A Rx0 minus
PCIE_A_LN0_RXP49AIOAVDD12_PCIEPCIe A Rx0 plus
PCIE_A_PEWAKEN274DIVDD_EXT_1V8PUPCIe A wake-up signal
PCIE_A_PERSTN275DOVDD_EXT_1V8PUPCIe A reset signal
PCIE_A_CLKREQN276DIOVDD_EXT_1V8PUPCIe A clock request signal
PCIE_B_CLKN272AIOAVDD12_PCIEPCIe B reference clock minus
PCIE_B_CLKP271AIOAVDD12_PCIEPCIe B reference clock plus
PCIE_B_LN0_TXN26AIOAVDD12_PCIEPCIe B Tx0 minus
PCIE_B_LN0_TXP29AIOAVDD12_PCIEPCIe B Tx0 plus
PCIE_B_LN0_RXN33AIOAVDD12_PCIEPCIe B Rx0 minus
PCIE_B_LN0_RXP30AIOAVDD12_PCIEPCIe B Rx0 plus
PCIE_B_PEWAKEN67DIVDD_EXT_1V8PUPCIe B wake-up signal
PCIE_B_PERSTN76DOVDD_EXT_1V8PUPCIe B reset signal
PCIE_B_CLKREQN70DIOVDD_EXT_1V8PUPCIe B clock request signal
PCIE_C_CLKN400AIOAVDD12_PCIEPCIe C reference clock minus
PCIE_C_CLKP399AIOAVDD12_PCIEPCIe C reference clock plus
PCIE_C_LN0_TXN396AIOAVDD12_PCIEPCIe C Tx0 minus
PCIE_C_LN0_TXP395AIOAVDD12_PCIEPCIe CTx0 plus
PCIE_C_LN0_RXN393AIOAVDD12_PCIEPCIe C Rx0 minus
PCIE_C_LN0_RXP394AIOAVDD12_PCIEPCIe C Rx0 plus
PCIE_C_PEWAKEN403DIVDD_EXT_1V8PUPCIe C wake-up signal
PCIE_C_PERSTN401DOVDD_EXT_1V8PUPCIe C reset signal
PCIE_C_CLKREQN402DIOVDD_EXT_1V8PUPCIe C clock request signal
PCIE_D_CLKN3AIOAVDD12_PCIEPCIe D reference clock minus,

Reserved

PCIE_D_CLKP265AIOAVDD12_PCIEPCIe D reference clock plus,

Reserved

PCIE_D_LN0_TXN39AIOAVDD12_PCIEPCIe D Tx0 minus, Reserved
PCIE_D_LN0_TXP38AIOAVDD12_PCIEPCIe D Tx0 plus, Reserved
PCIE_D_LN0_RXN44AIOAVDD12_PCIEPCIe D Rx0 minus, Reserved
PCIE_D_LN0_RXP41AIOAVDD12_PCIEPCIe D Rx0 plus, Reserved
 

GPIO76/ PCIE_D_PERSTN

 

209

 

DI

 

VDD_EXT_1V8

 

PD

MT6890 GPIO, used for 2+2+4 and 4+4+4 WIFI/BT

and RF co-exist control

signals

GPIO77/

PCIE_D_PEWAKEN

285DOVDD_EXT_1V8PDMT6890 GPIO, used for

2+2+4 and 4+4+4 WIFI/BT

Pin NamePin No.TypePower DomainReset ValuePin Description
     and RF co-exist control

signals

 

GPIO78/ PCIE_D_CLKREQN

 

162

 

DO

 

VDD_EXT_1V8

 

PD

MT6890 GPIO, used for 2+2+4 and 4+4+4 WIFI/BT

and RF co-exist control

signals

JTAG
TDI183DIVDD_EXT_1V8PDJTAG TDI,Reserved
TCK186DIVDD_EXT_1V8PDJTAG TCK,Reserved
TDO189DOVDD_EXT_1V8PDJTAG TDO,Reserved
TRST_N295DIVDD_EXT_1V8PDJTAG TRST,Reserved
TMS296DIVDD_EXT_1V8PDJTAG TMS,Reserved
SYSRSTB297DIVDD_EXT_1V8PDSystem reset,Reserved
I2C
I2C_SDA0115DIOVDD_EXT_1V8PUI2C data
I2C_SCL0112DOVDD_EXT_1V8PUI2C clock
I2S
I2S0_DO103DOVDD_EXT_1V8PDI2S data output signal
I2S0_MCK94DOVDD_EXT_1V8PDI2S clock output signal
I2S0_DI104DIVDD_EXT_1V8PDI2S data input signal
I2S0_BCK101DOVDD_EXT_1V8PDI2S data bit clock signal
I2S0_LRCK105DOVDD_EXT_1V8PDI2S frame clock signal
ADC
ADC0249AIVDD_EXT_1V8A/D conversion channel 0
ADC1252AIVDD_EXT_1V8A/D conversion channel 1
Debug UART
DBG_UART_TX129DOVDD_EXT_1V8PUDebug UART data

transmission

DBG_UART_RX126DIVDD_EXT_1V8PUDebug UART data reception
UART
AP_UCTS179DIVDD_EXT_1V8PDUART receive ready signal
AP_URTS164DOVDD_EXT_1V8PDUART transmit request signal
AP_UTXD177DOVDD_EXT_1V8PDUART transmit signal
AP_URXD173DIVDD_EXT_1V8PDUART receive signal
SPI
SPI0_MISO5DIVDD_EXT_1V8PDSPI interface input signal
SPI0_MOSI8DOVDD_EXT_1V8PDSPI interface output signal
SPI0_CSB6DOVDD_EXT_1V8PDSPI interface chip select

signal

SPI0_CLK9DOVDD_EXT_1V8PDSPI interface clock signal
AUDIO CODEC
CDC_RESET_N98DOVDD_EXT_1V8PDExternal CODEC reset signal
CDC_INT1_N100DIVDD_EXT_1V8PDExternal CODEC interrupt

signal

Pin NamePin No.TypePower DomainReset ValuePin Description
AUDIO_PWR_EN107DOVDD_EXT_1V8PDExternal CODEC power

enable

LCD
 

LSCK

 

80

 

DO

 

VDD_EXT_1V8

 

PD

CLK signal for DBI-C serial 3/4 wire SPI LCD, connect to

LCD CLK signal

 

 

 

 

LSDA

 

 

 

 

72

 

 

 

 

DO/DI

 

 

 

 

VDD_EXT_1V8

 

 

 

 

PD

Data signal for DBI-C serial 3/4 wire SPI LCD. For type interface I LCD, is data input/output signal. For type interface II LCD, is data output signal from FG360 module and connect to LCD data in

signal

 

LSA0

 

75

 

DO

 

VDD_EXT_1V8

 

PD

RS signal for DBI-C serial 4 wire SPI LCD,    DBI-C serial 3 wire SPI LCD not has this

signal

 

LSCE0B

 

71

 

DO

 

VDD_EXT_1V8

 

PD

CS signal for DBI-C serial 3/4

wire SPI LCD, connect to LCD CS signal

 

 

 

 

LSDI

 

 

 

 

74

 

 

 

 

DI

 

 

 

 

VDD_EXT_1V8

 

 

 

 

PD

Data signal for DBI-C serial 3/4 wire SPI LCD. For type interface II LCD, is data input signal from FG360 module and connect to LCD data output signal. For type interface I LCD, not has this

signal

 

LRSTB

 

78

 

DO

 

VDD_EXT_1V8

 

PD

Reset signal for DBI-C serial

3/4 wire SPI LCD, connect to LCD RST signal

DSI_TE141DIVDD_EXT_1V8PDLCD frame synchronization

signal

DISP_PWM156DOVDD_EXT_1V8PDLCD Backlight control PWM

signal

LCM_RST288DOVDD_EXT_1V8PDDSI LCD reset signal
LCD_PWR_EN1298DOVDD_EXT_1V8PDLCD power supply enable 1
LCD_PWR_EN2180DOVDD_EXT_1V8PDLCD power supply enable 2
DSI0_CKN406AIOAVDD12_DSIDSI LCD MIPI CLK minus
DSI0_CKP407AIOAVDD12_DSIDSI LCD MIPI CLK plus
DSI0_D0N405AIOAVDD12_DSIDSI LCD MIPI lane0 minus
DSI0_D0P404AIOAVDD12_DSIDSI LCD MIPI lane0 plus
DSI0_D1N408AIOAVDD12_DSIDSI LCD MIPI lane1 minus
DSI0_D1P409AIOAVDD12_DSIDSI LCD MIPI lane1 plus
WIFI/BT
BT_UTXD135DOVDD_EXT_1V8PDUART TX signal
BT_URXD138DIVDD_EXT_1V8PDUART RX signal
Pin NamePin No.TypePower DomainReset ValuePin Description
BT_URTS282DOVDD_EXT_1V8PDUART RTS signal
BT_UCTS283DIVDD_EXT_1V8PDUART CTS signal
PCM0_DO97DOVDD_EXT_1V8PDPCM data output
PCM0_DI95DIVDD_EXT_1V8PDPCM data input
PCM0_CLK96DOVDD_EXT_1V8PDPCM clock output
PCM0_SYNC93DOVDD_EXT_1V8PDPCM synchronization signal
 

EINT16

 

144

 

DO

 

VDD_EXT_1V8

 

PD

MT6890 GPIO, used for control WIFI RESET signal or

WIFI Power enable signal

 

EINT17

 

27

 

DO

 

VDD_EXT_1V8

 

PD

MT6890 GPIO, used for

control WIFI RESET signal or WIFI Power enable signal

 

EINT18

 

279

 

DO

 

VDD_EXT_1V8

 

PD

MT6890 GPIO, used for control WIFI RESET signal or

WIFI Power enable signal

EINT15212DIVDD_EXT_1V8PDInterrupt input signal, used as

WLAN_EN

BT_PRI_RXD150DIVDD_EXT_1V8PDWIFI/BT and RF co-exist

control signals

BT_ACT_TXD153DOVDD_EXT_1V8PDWIFI/BT and RF co-exist

control signals

WLAN_ACT287DIVDD_EXT_1V8PDWIFI/BT and RF co-exist

control signals

PTA_TX99DOVDD_EXT_1V8PDWIFI/BT and RF co-exist

control signals

PTA_RX102DIVDD_EXT_1V8PDWIFI/BT and RF co-exist

control signals

WIFI_GPIO1286DIOVDD_EXT_1V8PDWIFI control signal 1,

Reserved

WIFI_GPIO2291DIOVDD_EXT_1V8PDWIFI control signal 2,

Reserved

MMW
NC237Reserved
NC223Reserved
NC217Reserved
NC240Reserved
NC235Reserved
NC229Reserved
NC243Reserved
NC247Reserved
NC241Reserved
NC246Reserved
NC259Reserved
NC253Reserved
Reserved
RESERVED23, 32, 48,

293,426~430

NC
Pin NamePin No.TypePower DomainReset ValuePin Description
 

NC

165,168,171,

174,177,231,

255,290,292,

294,410~425

 

 

 

 

Pin NamePin No.
GND
 19, 31, 35, 36, 42, 50, 52, 81, 82, 83, 90, 91, 92, 118, 119, 122, 124, 125, 127, 128, 131,
 132, 133, 134, 136, 137, 140, 142, 143, 145, 146, 147, 149, 151, 152, 154, 155, 158, 160,
 161, 163, 164, 167, 169, 170, 172, 173, 176, 178, 179, 181, 182, 185, 187, 188, 190, 191,
 192, 194, 195, 196, 197, 200, 202, 203, 206, 208, 213, 214, 215, 218, 220, 221, 222, 224,
 226, 227, 228, 230, 232, 233, 234, 236, 238, 239, 242, 244, 245, 248, 250, 251, 254, 256,
GND257, 258, 260, 262, 266, 277, 284, 289, 299, 300, 301, 302, 303, 304, 305, 306, 307, 308,

309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, 325, 326,

 327, 328, 329, 330, 331, 332, 333, 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344,
 345, 346, 347, 348, 349, 350, 351, 352, 353, 354, 355, 356, 357, 358, 359, 360, 361, 362,
 363, 364, 365, 366, 367, 368, 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380,
 381, 382, 383, 384, 385, 386, 387, 388, 389, 390, 391, 392, 397,398

Note:

  1. The PWRKEY and SYS_RESIN_N pins have internal pull-up, and the pull-up power supply is in exclusive mode; no external pull-up is required; PON_1 pin module with weak pull-down, maximum input voltage must not exceed VBAT_BB.

Structural Specification

Product Appearance
The appearance of the FG360 module product is as shown:

Dimension of Structure

The structural dimensions of the FG360 module are shown in the figure: Fibocom FG360-NA 5G Smart Module fig 5

Note: Unmarked dimensional tolerances are 0.1mm.

Storage

Refer to the FIBOCOM FG360-NA Series SMT Design Guide.

Packing 

Refer to the FIBOCOM FG360-NA Series SMT Design Guide.

Documents / Resouces

Download manual
Here you can download full pdf version of manual, it may contain additional safety instructions, warranty information, FCC rules, etc.


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