Microchip Azurite 9x9 Evaluation Board Hardware User Guide

Azurite 9×9 Evaluation Board
Hardware User’s Guide

Azurite 9×9 Evaluation Board Hardware

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Chapter 1. Hardware Overview

1.1 SUPPORTED DEVICES
The Azurite 9×9 Evaluation Board supports Azurite-family devices packaged in the 9 mm x 9 mm VQFN package.
1.2 RELATED DOCUMENTS

• Azurite 9 mm x 9 mm Evaluation Board Schematic
• Azurite 9 mm x 9 mm Evaluation Board Bill of Materials
• Data sheets for the part numbers listed in the Supported Devices section.

1.3 HARDWARE FEATURE SUMMARY
Azurite 9×9 Evaluation Board is a test and demonstration platform with support for the full feature sets of the Azurite family of timing ICs.
A top side image of the board is shown in Figure 1-1. Throughout this document, the abbreviation “DUT” is used to refer to “Device Under Test”, meaning the Microchip timing IC on the board.
The board includes the following major components and hardware features:

1.3.1 Major Components

• Timing IC (DUT)
• Low noise linear regulators
• USB Interface for optional connection to PC with GUI software
• SMA connectors for access to all DUT clocks

1.3.2 Hardware Features

•  Single 5VDC external power interface with connector for AC/DC wall adapter
• Fully configurable DUT power options
• DUT reset switch
• USB interface with USB-B connector for PC GUI connection
• Pin headers with direct access to board’s SPI/I2C bus. Board can provide interface for GUI to control  off-boardDUT, or external SPI  master device can interface with on-board DUT.
• Status LEDs
• Oscillator options: on-board crystal, on board XO, XO on daughter card, or separate oscillator board
• SMA connectors on all input and output clocks
• Jumper-configurable termination and coupling
• Additional discrete component configuration options for advanced users

1.3.3 Power Supply
The board is normally powered via connector J3 using the provided AC wall-plug 5VDC power supply. Red LED D2 illuminates to indicate that the board is powered. Advanced power options for lab experimentation are also provisioned on the board.
1.3.4 USB Interface
The Windows® -based Microchip Timing GUI software communicates with the board via USB connector JDR1.

Chapter 2. Hardware Configuration

To provide flexibility to users, the board supports several configurations, some of which require GUI supervision via USB. Other configurations provide external device access points to the board’s serial bus by means of pin headers.

2.1 DUT SERIAL INTERFACE
The board supports operating the DUT serial interface in either SPI or I2C mode. The bus master can be either the on-board USB Device U5 or an external bus master connected to JP12 or JP20. Modes 1 through 4 in Table 2-1 define how to configure the board for each bus master/bus mode combination. Table 2-2 defines the pinout for connector JP20. Table 2-3 defines the pinout for connector JP12. For both connectors, pins 4 and 6 should be left unconnected.

TABLE 2-1: EVALUATION BOARD SERIAL BUS MODES

TABLE 2-1: EVALUATION BOARD SERIAL BUS MODES (CONTINUED)

Note 1: Set JP14 = 2-3 and JP15 = 2-3 to support Total Phase Aardvark Adapter I2C mode pinout.
TABLE 2-2: CONNECTOR JP20 PINOUT

TABLE 2-3: CONNECTOR JP12 PINOUT

2.2 DUT RESET SWITCH
DUT reset can be initiated in one of two ways:

• Press momentary switch S2
• Software: Set U1 bit port ADBUS5 as output pin and toggle it low, then high.

Additionally, the evaluation board supports the hardware-configurable DUT reset options listed in Table 2-4.
TABLE 2-4: DUT RESET HARDWARE CONFIGURATION

2.3 BOARD CONNECTIONS AND SETTINGS
The following sections provide detailed listings of the various board hardware configuration options.
2.3.1 Power Supply
The board provides several options for evaluating device performance with respect to power supply configuration. DUT power configuration is highly customizable. A thorough understanding of the DUT and board  operationshould  be developed prior to customizing power settings  on the board. Table  2-5 lists the power-supply-related hardware connectors and their functions.

TABLE 2-5: POWER CONNECTIONS AND SETTINGS

TABLE 2-5: POWER CONNECTIONS AND SETTINGS (CONTINUED)

2.3.2 GPIO
The DUT has five GPIO interface pins, GPIO[4:0]. The board has a DIP switch, LED, test header pin, and USB device port pin for control and monitoring of each of these
GPIOs. A DUT GPIO pin state configured using a DIP switch may be overdriven by the associated USB device port pin. Table 2-6 lists the board hardware functionality for
each DUT GPIO pin.

TABLE 2-6: GPIO PORTS SUMMARY

2.3.3 Local Reference Oscillator
The board supports several local reference oscillator options. A 49.152 MHz crystal is typically populated at component Y2. Alternately any of several XO clock sources can
be jumper-selected to connect to the DUT OSCB pin. Table 2-7 lists the supported hardware configuration options. Table 2-8 summarizes the hardware configuration for
the four most common reference clock modes.

TABLE 2-7: DUT OSCB HARDWARE CONFIGURATION

TABLE 2-7: DUT OSCB HARDWARE CONFIGURATION (CONTINUED)

TABLE 2-8: DUT LOCAL REFERENCE OPTIONS

TABLE 2-8: DUT LOCAL REFERENCE OPTIONS (CONTINUED)

2.3.4 Input Clocks
The board provides a hardware-configurable input termination circuit on each DUT reference input clock which supports a wide range of input clock formats. Table 2-9 lists the input clock hardware connectors and functionality. Table 2-10 defines how to configure each input clock’s termination configuration jumpers for single-ended or differential mode operation.

TABLE 2-9: INPUT CLOCK HARDWARE CONFIGURATION

TABLE 2-9: INPUT CLOCK HARDWARE CONFIGURATION (CONTINUED)

TABLE 2-10: INPUT CLOCK MODE SELECTION SETTINGS

TABLE 2-10: INPUT CLOCK MODE SELECTION SETTINGS (CONTINUED)

TABLE 2-10: INPUT CLOCK MODE SELECTION SETTINGS (CONTINUED)

2.3.5 Output Clocks
The board supports evaluation of all device OUT output clocks using SMA connectors. Table 2-11 lists the output clock hardware connectors and functionality.
As shipped from Microchip, all OUT clock paths are DC-coupled from the device pins to the SMA connectors. When an output pair is configured for programmable differential or LVDS signal format, the pair can be DC-coupled to 100Ω differential termination at the receiver. If the path must be AC-coupled, then in the output window of the GUI, set
Diff Internal Bias Resistor to “200ohms – AC coupled”.
Note that, as shipped from Microchip, the OUT P and N paths do not have source-series termination resistors installed. See the output_driver_level::drive register field description in the device data sheet for typical CMOS output driver impedance as a function of VDDO and drive strength.

TABLE 2-11: OUTPUT CLOCK HARDWARE CONFIGURATION

TABLE 2-11: OUTPUT CLOCK HARDWARE CONFIGURATION (CONTINUED)

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09/14/21