Transphorm 100w Tpa1001c02-v1.2 Power Adapter User Guide

TRANSPHORM 100W TPA1001C02-V1.2 Power Adapter

Power Adapter Description

This design guide of the Transphorm GaN and Onsemi NCP1623A & NCP1342 controller reference design board describes a 100 W, average efficiency up to 91.93%, with programmable output voltage (5 V/5 A, 9 V/5 A, 15 V/5 A, 20 V/5 A). The power supply uses PFC controller NCP1623A collocation Transphorm GaN TP65H150LSG (650 V SuperGaN FET), Plus the Quasi-Resonant Flyback controller NCP1342 Collocation TP65H300G4LSG (650 V SuperGaN FET). This design shows high power density and efficiency. This document contains the power supply specification, schematic, bill-of-materials, transformer documentation, printed circuit layout, and performance data.

Features 

• Integrated Transphorm GaN TP65H150LSG for PFC controller topology
• Integrated Transphorm GaN TP65H300G4LSG for flyback converter topology
• Board-end over 91% Efficiency(90VAC/20V)
• Flat Efficiency Across Universal (90-264 VAC) Input Voltage and Load
• Tight Switching Frequency Regulation for Improved Input EMI Filter Utilization
• Up to 200KHz Switching Frequency Operation
• OTP, UVLO, OPP and OSC Protections
• < 100mW (230Vac) No Load Power Consumption of the IC
• Up to 100W Output Power

Applications

• High-Power-Density USB-PD AC/DC Power Supplies

Warning

1. Caution – High Voltage Operation: Lethal high voltages are present when this evaluation board is powered from AC mains. Improper contact with high voltages could lead to electrical shock, burn and/or fire hazards, risking property damage, personal injury, and death.
2. Evaluation Purpose Only: This evaluation board is intended for evaluation purposes only and not for commercial use. Care must be taken when testing the board, and an isolation transformer should be utilized.
3. Patents: The evaluation board design, along with circuits shown in this test report, may be covered by one or more U.S. and foreign existing/pending patents.

100W Adapter Form Factor

Schematic

Circuit Description

Input Protection
The design incorporates a slow-acting input fuse (F101) as a form of protection in case of destructive failure of any of the downstream components.

EMI Filtering
To meet the target EN55022 conducted EMI specification with sufficient margin with the least number of components and the highest power processing efficiency, the design utilizes an input filter consisting of an X-capacitor (CX101) and a single common- mode choke (LF101,LF102) as well as transformer (T1) construction for better EMI performance.

Fault Protections

PCB Layout and Bom List

Layout design

Transphorm SuperGan FET

Bill of Materials

Main Chokes Specification

CM and DM Chokes Specification and Other Configurations

Performance Data

Efficiency Standard
DoE Level VI and CoC Version 5 Tier-2 4-point (25%, 50%, 75%, 100%) average efficiency, along with CoC Version 5 Tier-2 10% load efficiency requirements.

Efficiency Data
The following efficiency data are averaged from PD 100W boards. The boards are soaked for 5 minutes before measuring the efficiency with output measured after the USB-PD disconnect FET.

Table-3 115Vac Efficiency Data

Table-4 230Vac Efficiency Data

Table-5 Heavy Load Efficiency Data

Table-6 No-Load Power Consumption

Efficiency Graphs
The following graphs demonstrate 5 V/ 9 V/ 15 V/ 20 V efficiency results with output measured after the USB- PD disconnect FET.

PPS Protocol Detection

Waveforms and Curves

Switching Waveform
The key waveforms for the worst-case voltage conditions as seen by the primary side GaN Transistor and secondary side MOSFET are shown below.

EMI Scan

Output Voltage Ripple
The output voltage ripple was measured using a voltage probe. Measurement is done at load side using an E-Mark USB cable.

Table-7 Output Voltage Ripple Summary

Thermal Measurements
The key component temperatures are shown below for 90Vac & 264Vac full load (20V/100W) operating conditions after 1hr bake time.

Hardware Information

Table-9 Equipment List